This invention relates to a field emission element and a process for manufacturing the same, and more particularly to a field emission element which is used as an electron source for a variety of electron beam application devices such as a luminous-type display device, a write head for a printer, an electron microscope, an electron beam exposure device, an electron gun for a CRT, a micro wave amplifier tube and the like and decreased in manufacturing cost and a process for manufacturing the same.
When an electric field applied to a surface of a metal material or a semiconductor material is set to be about 10.degree. (V/m), a tunnel effect permits electrons to pass through a barrier, resulting in the electrons being discharged to a vacuum even at a normal temperature. This is referred to as "field emission" and a cathode constructed so as to emit electrons based on such a principle is referred to as "field emission cathode" (hereinafter also referred to as "FEC").
Recently, semiconductor processing techniques permit a field emission cathode of the surface discharge type to be formed of field emission cathode elements as small as microns. The field emission cathode thus formed tends to be used for a fluorescent display device, a CRT, an electron microscope and an electron beam apparatus.
A conventional field emission element typically includes a so-called Spindt-type cathode widely known in the art, which was published as a microchip display by Standard Research Institute (SRI) and Laboratoire d'Electroniqu de Technologie et de l'Instrumentation (LETI) in France. The Spindt-type cathode is formed in such a manner that a gate electrode is formed on a thermal oxidation film or an insulating film provided on a metal film electrode for an emitter formed on a glass substrate and the metal gate film and insulating film each are formed with an opening. Then, the opening is formed therein with an emitter of a conical shape for electron field emission using self-alignment techniques of depositing metal such as Mo or the like acting as a mask by electron beam deposition.
FIG. 17 shows a device having a so-called Spindt-type field emission cathode (hereinafter also referred to as "FEC") incorporated therein which includes a resistor between an emitter and a cathode element.
More particularly, the device shown in FIG. 17 includes cathode lines 101 formed on a substrate 100. The cathode lines 101 each are formed thereon through a resistive layer 102 with emitters 115 of a conical shape according to a method described hereinafter. Also, the cathode lines 101 each are provided thereon with a gate electrode layer or gate line 104 through an insulating layer 103. The gate electrode layer 104 is formed with round openings, in which the emitters 115 are arranged. The emitters 115 each are so arranged that a tip portion thereof is exposed from the opening of the gate electrode layer 104.
Arrangement of the resistive layer between each of the emitters 115 and each of the cathode elements of the cathode, even when dust or an electric field causes short-circuiting to occur between the emitter and the gate which are arranged in close proximity to each other during manufacturing or operation of the device, effectively eliminates a disadvantage that a large current flowing through the emitter due to the short-circuiting causes fusion of the emitter to lead to scattering of the emitter toward any cathode elements arranged in proximity thereto, resulting in deteriorating a function of the field emission cathode.
Now, an example of manufacturing of such a Spindt-type FEC as described above will be described hereinafter with reference to FIGS. 18(a) to 18(f).
First, as shown in FIG. 18(a), the cathode line 101 is formed on the substrate 100 made of glass or the like by vapor deposition and then the resistive layer 102 is formed on the cathode line 101 by sputtering deposition. Thereafter, the insulating layer 103 which is made of silicon oxide is formed on the resistive layer 102.
Then, the insulating layer 103 is provided thereon with the gate electrode layer 104 made of niobium (Nb) by vapor deposition, on which a photoresist is then deposited, followed by forming the gate electrode layer 104 with an opening 113 by patterning and etching as shown in FIG. 18(b), resulting in a laminate being provided.
The laminate thus formed may be subject to wet etching using BHF or the like or reactive ion etching (RIE) by means of CHF.sub.6, so that the insulating layer 103 is subject to isotropic etching, resulting in being formed with a hole 114 in which the emitter 115 is formed, as shown in FIG. 18(c).
Then, as shown in FIG. 18(c), aluminum is deposited in an oblique direction on the substrate 100 while rotating the substrate 100, leading to formation of a release layer 105. Such oblique deposition permits the release layer 105 to be selectively deposited only on a surface of the gate electrode layer 104 other than in the hole 114 of the insulating layer 103.
Subsequently, as shown in FIG. 18(d), a material layer 106 made of a molybdenum (Mo) mixture or the like is vertically downwardly deposited with respect to the substrate 100 from above the release layer 105 by electron beam deposition. This causes the material layer 106 to enter the hole 144 of the insulating layer 103 as well, so that the material layer 106 may be deposited in the form of a conical shape on the resistive layer 102, leading to formation of the emitter 115.
Thereafter, the release layer 115 and material layer 106 formed on the gate electrode layer 104 are removed by etching, resulting in such an FEC as shown in FIG. 18(e) being formed. The FEC shown in FIG. 18(e) permits a distance between the conical emitter 115 and the gate electrode layer 104 to be reduced to a level as small as submicrons, so that application of a voltage as small as tens volts between the emitter 115 and the gate 104 permits the emitter 115 to emit electrons.
Also, as shown in FIG. 18(f), a second insulating layer 107 and a second gate electrode layer 108 may be laminated in turn on the gate electrode layer 104, followed by formation of the FEC as described above. This results in the FEC being constructed into a triode structure in which the second gate electrode layer 108 acts as a focusing electrode.
The step of forming the field emission element described above and shown in FIG. 18(d) typically uses an electron beam deposition apparatus for deposition of the emitter.
Now, an electron beam deposition apparatus conventionally used for this purpose will be described with reference to FIG. 19. The electron beam deposition apparatus includes a vacuum vessel in which a crucible H is arranged for melting a material to be deposited (hereinafter referred to as "deposited material"). The crucible H has a deposited material M for forming an emitter placed therein.
Reference character F designates a filament for emitting electron beams therefrom. Electron beams EB emitted from the filament is deflected as indicated by arrows in FIG. 19 by means of a deflection coil (not shown) and then impinged on the deposited material M while being accelerated by an acceleration electrode P.
Such impingement of the electron beams on the material M causes it to be heated to a degree sufficient to be melted, to thereby be vaporized or evaporated. This results in the material M being deposited on the laminate as shown in FIG. 18(d), leading to formation of the conical emitter 115.
In general, the electron beam deposition causes a composition of the material and purity thereof to be subject to restriction. Also, the electron beam deposition is to uniformly heat the deposited material M to convert it into a vapor while scanning electron beams, therefore, it requires to use a crucible formed with an opening of an increased diameter.
However, formation of the tip portion of the conical emitter into a pointed shape requires that the deposition material or metal has a high melting point. Unfortunately, melting of the metal having a high melting point for the deposition causes the crucible to be likewise heated to a high temperature, so that it is highly difficult to carry out the deposition while ensuring high purity or quality of a film formed by the deposition. Also, use of such a crucible formed with an opening of an increased diameter as described above causes the material M vaporized or evaporated to extensively diffuse as indicated at dotted lines in FIG. 19, to thereby act as a spot evaporation source, resulting in the amount of vaporized molecules of the material which are vertically incident on the laminate on which the FEC is to be formed being decreased. This prevents the emitter from being uniformly formed into a conical shape.
Unfortunately, this leads to a problem that the emitter 115, as shown in FIG. 20, is formed into a shape wherein a peripheral portion of the emitter is inclined at a tip portion thereof on the basis of a central portion of the laminate.
In order to solve the problem, an approach would be considered that the evaporation source and laminate are positioned separate from each other to move the laminate while rotating it, to thereby permit the evaporated material to be substantially vertically incident on the laminate. However, in such an apparatus as shown in FIG. 19, an increase in distance L between the evaporation source and the laminate causes mechanical requirements for evacuating the apparatus to a vacuum to be excessively increased and deteriorates throughput for depositing the material for the emitter on the laminate, resulting in an extensive loss of the deposited material of a high cost.
In view of the above, employment of a sputtering process for formation of the emitter is attempted as taught in "Vacuum" Vol. 34, No. 8. However, the sputtering process is to essentially utilize sputter of neutrons and/or molecules occurring when accelerated ions are impinged on a solid material, therefore, it causes an angle at which particles sputtered due to impingement or collision between gas molecules and a sputter material are incident on the laminate to be increased, leading to a decrease in the number of particles passing through the gate opening of a small size.
For this reason, the sputtering process often causes the gate opening to be clogged before the emitter is formed into a conical shape, to thereby substantially fail to uniformly form the emitter of a conical shape of which the tip portion is pointed or sharpened.
Also, cutting of the sputter particles having a high energy level or an decrease in pressure of the gas molecules using deposition by the sputtering process causes the throughput to be highly decreased to deteriorate yields of the material, leading to an increase in manufacturing cost.
Further, in the field emission element described above, the emitter is generally formed of a polycrystal, to thereby cause a disadvantage that adsorption and release of the gas occurring at grain boundaries of the crystal during operation of the field emission element render discharge of electrons therefrom unstable and/or concentration of an electric field on the emitter causes breakage of the emitter. An approach to the problem is proposed in Japanese Patent Application Laid-Open Publication No. 86427/1979 which is directed to a method for manufacturing a field emission element including an emitter of a monocrystalline structure. The method disclosed is constructed so as to arrange a seed monocrystal on a bottom of a recess formed on a substrate and form an emitter including a pointed tip end while acting the seed as a core.
Unfortunately, it was found that the method using the seed monocrystal as a core to grow the monocrystalline emitter has many disadvantages.
One of the disadvantages is that the method fails to form the emitter with satisfactory reproducibility and uniformity. Another disadvantage is that it is highly difficult to accurately set a positional relationship between the tip portion of the emitter and the gate with good reproducibility because a shape of the emitter is varied depending on growth of the crystal. A further disadvantage of the method is that a combination of the insulating material and the seed crystal is subject to substantial restriction. Still another disadvantage is that it is highly difficult to sharpen or point the tip portion of the emitter. Yet another disadvantage is that the material for the emitter is subject to restriction. The method has a still further disadvantage of being complicated in process.
Further, in the conventional field emission element, it is required to form the insulating layer on the substrate. In view of the requirement, a layer of SiO.sub.2 is formed on a surface of a Si substrate. For this purpose, formation of SiO.sub.2 is generally carried out by thermal oxidation of Si, CVD or the like.
However, formation of SiO.sub.2 by thermal oxidation, CVD or the like causes the insulating layer formed to have an amorphous structure or a highly fine polycrystalline structure approximating the amorphous structure, resulting in causing disadvantages.
One of the disadvantages is that the insulating layer is deteriorated in uniformity of dielectric strength over an increased area of the insulating layer to cause a variation in characteristics of the field emission element, leading to a distribution of a current density of the element and a deterioration of the current density due to breakage of the emitters which starts from the emitters of good characteristics.
Another disadvantage is that the conventional insulating layer made of a highly fine polycrystal approximating an amorphous structure is readily varied in insulating characteristics with time due to discharge of occluded gas from the grain boundaries and/or damage to the field emission emitter by electron impact, resulting in deterioration in field emission characteristics of the element readily occurring.
A further disadvantage is that the conventional insulating layer having a highly fine polycrystalline structure approaching an amorphous structure tends to be deteriorated in insulating characteristics by a temperature encountered during manufacturing of a device having the field emission element mounted thereon.
Still another disadvantage is encountered when the insulating layer is applied to a high-speed device. More particularly, in the high-speed device, capacitance between the emitter and the gate constitutes an important factor. In order to further promote a decrease in capacitance, there is made an attempt to construct the field emission element into a finer structure. However, the attempt causes deterioration in insulating strength of the insulating layer. Unfortunately, the conventional insulating layer fails to exhibit insulating strength sufficient to realize the attempt.